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Chip design for submicron VLSI

Uyemura, John P.

Chip design for submicron VLSI CMOS layout and simulation John P. Uyemura - Australia Cengage Learning 2006 - xvi, 411p.

9788131501955


Metal oxide semiconductors, Complementary--Design and construction
Integrated circuits--Very large scale integration--Design and construction
Metal oxide semiconductors, Complementary

621.3815 Uy3c

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