CMOS SRAM circuit design and parametric test in nano-scaled technologies (Record no. 12519)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00667nam a2200205Ia 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20210903160213.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 170527s2016||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9788132202325 |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | eng |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.39 P2893c |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Mahesh M. Rathore |
| 245 #0 - TITLE STATEMENT | |
| Title | CMOS SRAM circuit design and parametric test in nano-scaled technologies |
| Remainder of title | : process-aware SRAM design and test |
| Statement of responsibility, etc | by Pavlov, Andrei, Ph. D |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Name of publisher | Springer (India) |
| Year of publication | 2011 |
| Place of publication | New Delhi |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xvi, 193p. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Metal oxide semiconductors |
| General subdivision | Complementary--Design |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Random access memory |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Nanoelectronics |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Sachdev, Manoj |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Text Book |
| Lost status | Damaged status | Collection code | Home library | Current library | Shelving location | Date acquired | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|---|
| Electronic and Communication | Central Library | Central Library | 02/08/2017 | 621.39 P2893c | 12892 | Text Book |