CMOS circuit design, layout, and simulation (Record no. 1358)
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000 -LEADER | |
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fixed length control field | 00645nam a2200229Ia 4500 |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20210924130052.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 170527s2016||||xx |||||||||||||| ||und|| |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
ISBN | 9788120316829 |
041 ## - LANGUAGE CODE | |
Language code of text/sound track or separate title | eng |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.39732 B176c |
100 ## - MAIN ENTRY--AUTHOR NAME | |
Personal name | Baker, R. Jacob |
245 #0 - TITLE STATEMENT | |
Title | CMOS circuit design, layout, and simulation |
Statement of responsibility, etc | by R. Jacob Baker |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Name of publisher | Prentice-Hall |
Year of publication | 2004 |
Place of publication | New Delhi |
300 ## - PHYSICAL DESCRIPTION | |
Number of Pages | xviii, 902p. |
440 ## - SERIES STATEMENT/ADDED ENTRY--TITLE | |
Title | Institute of Electrical and Electronics Engineers |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical Term | Simulation methods |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical Term | Integrated circuit layout |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical Term | Electronic circuit design |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | Text Book |
960 ## - PHYSICAL LOCATION (RLIN) | |
Physical location, PLOC (RLIN) | a |
852 ## - | |
-- | GB |
Lost status | Damaged status | Collection code | Home library | Current library | Shelving location | Date acquired | Full call number | Accession Number | Koha item type |
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Electronic and Communication | Central Library | Central Library | 02/08/2017 | 621.39732 B176c | 784 | Text Book | |||
Electronic and Communication | Central Library | Central Library | 02/08/2017 | 621.39732 B176c | 1480 | Text Book |