Verilog and system verilog gotchas (Record no. 20604)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00649nam a22002057a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20210910144531.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 180503b ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9788184894608 |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | eng |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.392 Su841v |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Sutherland, Stuart |
| 245 ## - TITLE STATEMENT | |
| Title | Verilog and system verilog gotchas |
| Remainder of title | 101 Common coding errors and how to avoid them |
| Statement of responsibility, etc | Stuart Sutherland |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New Delhi |
| Name of publisher | Springer (India) Private Limited |
| Year of publication | 2007 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xxii, 214p. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Verilog (Computer hardware description language) |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Systems engineering |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Computer engineering |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Mills, Don |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Text Book |
| Lost status | Damaged status | Collection code | Home library | Current library | Shelving location | Date acquired | Cost, normal purchase price | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|
| Electronic and Communication | Central Library | Central Library | General Stacks | 03/05/2018 | 495.00 | 621.392 Su841v | 16129 | Text Book |