VLSI design methodology development (Record no. 23889)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00501nam a22001817a 4500 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20230203161129.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 230203b |||||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9789353948979 |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | eng |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 D584v |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Dillinger, Thomas |
| 245 ## - TITLE STATEMENT | |
| Title | VLSI design methodology development |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | Noida |
| Name of publisher | Pearson |
| Year of publication | 2020 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xvii, 734p. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Microelectronics |
| General subdivision | Methodology |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Integrated circuits |
| General subdivision | Very large scale integration |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Text Book |
| Lost status | Damaged status | Collection code | Home library | Current library | Shelving location | Date acquired | Cost, normal purchase price | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|
| Electronic and Communication | Central Library | Central Library | General Stacks | 03/02/2023 | 850.00 | 621.395 D584v | 18534 | Text Book |