TY  - BOOK
AU  - Mahesh M. Rathore
AU  - Sachdev, Manoj
TI  - CMOS SRAM circuit design and parametric test in nano-scaled technologies:  : process-aware SRAM design and test
SN  - 9788132202325
U1  - 621.39 P2893c 
PY  - 2011///
CY  - New Delhi
PB  - Springer (India)
KW  - Metal oxide semiconductors
KW  - Complementary--Design
KW  - Random access memory
KW  - Nanoelectronics
ER  -