Uyemura, John P. <br/><br/>
Chip design for submicron VLSI  CMOS layout and simulation 
John P. Uyemura 
 - Australia  Cengage Learning  2006 
 - xvi, 411p. 
<br/><br/><label>ISBN: </label>9788131501955 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Metal oxide semiconductors, Complementary--Design and construction<br/>Integrated circuits--Very large scale integration--Design and construction<br/>Metal oxide semiconductors, Complementary
<br/><br/><label>Dewey Class. No.: </label>621.3815 Uy3c