TY  - BOOK
AU  - Uyemura, John P.
TI  - Chip design for submicron VLSI: CMOS layout and simulation
SN  - 9788131501955
U1  - 621.3815 Uy3c 
PY  - 2006///
CY  - Australia
PB  - Cengage Learning
KW  - Metal oxide semiconductors, Complementary
KW  - Design and construction
KW  - Integrated circuits
KW  - Very large scale integration
ER  -