Palnitkar, Samir <br/><br/>
Design verification with e 
by Samir Palnitkar 
 - New Delhi  Pearson Education (Singapore)  2004 
 - xxxvii, 362p. 
<br/><br/><label>ISBN: </label>9788129705372 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Computer Architecture<br/>Computer hardware description languages<br/>Integrated circuits--Verification
<br/><br/><label>Dewey Class. No.: </label>621.392 P185d