000			00607nam a22002177a 4500
999			_c22701 _d22701
005			20200908163547.0
008			200908b ||||| |||| 00| 0 eng d
020			_a9789353062019
041			_aeng
082			_a621.3815 M317d6
100			_aMano, M. Morris
245			_aDigital design _bwith an introduction to the verilog HDL, VHDL and System verilog _cM. Morris Mano
250			_a6th ed.
260			_aNoida _bPearson _c2018
300			_a765p.
650			_aLogic design
650			_aLogic circuits
650			_aDigital integrated circuits
700			_aCiletti, Michael D.
942			_cBK